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ds04-29121-1e fujitsu semiconductor data sheet spread spectrum clock generator mb88161 description mb88161 is a clock generator for emi (electro magnetic interference) reduction. th e peak of unnecessary radi- ation noise (emi) can be attenuated by making the oscilla tion frequency slightly modulate periodically with the internal modulator. features ? input frequency : 20 mhz to 28 mhz (multiplied by 1), 14 mhz to 40 mhz (multiplied by 2) multiplication rate : 1, 2 output frequency : 20 mhz to 28 mhz (multiplie d by 1), 28 mhz to 80 mhz (multiplied by 2) modulation rate : no modulation, 0.5 % , 1.0 % , 2.0 % , ? 1.0 % , ? 2.0 % , ? 4.0 % (the terminal can be selected.) equipped with oscillation circuit : range of oscillation 10 mhz to 40 mhz built-in oscillation stabilization capacitance : 4pf (typ) modulation clock output duty : 40 % to 60 % modulation clock cycle-cycle jitter : less than 100 ps low current consumption by cmos process : 7.0 ma (24 mhz : no load, typ-sample, typ-condition) power supply voltage : 2.7 v to 3.6 v operating temperature : ? 40 c to + 85 c package : bcc 18-pin pac k ag e 18-pin plastic bcc ( lcc - 18p - m05 )
mb88161 2 pin assignment pin description pin no. pin name i/o description 1s1i modulation rate setting pin (with pull-up resistance) 2nc ? non-connection pin (do not connect anything) 3nc ? non-connection pin (do not connect anything) 4nc ? non-connection pin (do not connect anything) 5nc ? non-connection pin (do not connect anything) 6mltpi multiplication rate setting pin (with pull-down resistance) 7v dd ? power supply voltage pin 8xini resonator connection pin / clock input pin 9xouto resonator connection pin 10 oe i clock output enable pin (with pull-up resistance) 11 nc ? non-connection pin (do not connect anything) 12 nc ? non-connection pin (do not connect anything) 13 nc ? non-connection pin (do not connect anything) 14 nc ? non-connection pin (do not connect anything) 15 s0 i modulation rate setting pin (with pull-up resistance) 16 v ss ? gnd pin 17 sprd i modulation type setting pin (with pull-up resistance) 18 out o modulation clock output pi n (oe= ?l? hi-z output) 234 56 7 8 9 18 17 16 1 14 13 12 11 10 15 s0 v ss s prd out s1 oe xou t xin v dd mlt p n c n c n c n c mb88161 n c n c n c n c (top view)
mb88161 3 i/o circuit type (continued) pin circuit type remarks oe with pull-up resistor the value of pull-up resistor is switched by the input level of oe signal. 800 k ? at oe= ?l? (typ) 22 k ? at oe= ?h? (typ) cmos hysteresis input s0, s1, sprd with pull-up resistor 50 k ? (typ) cmos hysteresis input pull-up resistor is disconnected at oe= ?l?, and internal signal is fixed to ?l?. mltp with pull-down resistor 50 k ? (typ) cmos hysteresis input pull-down resistor is disconnected at oe= ?l?, and internal signal is fixed to ?l?. out cmos output i ol = 8.0 ma hi-z output at oe= ?l? 800 k ? 22 k ? oe signal note : at oe=?l? 22k ? pull up cut 50 k ? oe signal note : at oe=?l? pull up cut 50 k ? oe signal note : at oe=?l? pull down cut oe signal note : at oe=?l? hi-z output
mb88161 4 (continued) pin circuit type remarks xin, xout oscillation circuit built-in feedback resistance : 500 k ? (typ) built-in oscillation stabilization capacitance : 4 pf (typ) 4 pf x in x out 4 pf 500 k ?
mb88161 5 handling devices preventing latch-up a latch-up can occur if, on this device, (a) a voltage higher than power supply voltage or a voltage lower than gnd is applied to an input or output pin or (b) a voltage higher than the rating is applied between power supply and gnd. the latch-up, if it occurs, significantly increases the power supply current and may cause thermal destruction of an element. when you use this device , be very careful not to exceed the maximum rating. handling unused pins do not leave an unused input pin open, since it may ca use a malfunction. handle by, using a pull-up or pull- down resistor. power supply pins please design connecting the power s upply pin of this device by as low impedance as possible from the current supply source. we recommend connecting electr olytic capacitor (about 10 f) and the ceramic capacitor (about 0.01 f) in parallel between power supply and gnd n ear the device, as a bypass capacitor. oscillation circuit noise near the xin pin and xout pin may cause the device to malfunction. design printed circuit boards so that electric wiring of xin pin or xout pin and the resonator do not intersect other wiring. design the printed circuit board that surro unds the xin pin and xout pin with ground.
mb88161 6 block diagram v dd ou t v ss r f = 500 k ? 4 pf oe x out xin mltp s prd s0 s1 4 pf 1 ? m 1 ? n 1 ? l idac ico modulation clock output output enable modulation type setting modulation rate setting reference clock pll block reference clock phase compare v/i conversion modulation logic modulation rate setting s0, s1 loop filter modulation clock output mb88161 pll block charge pump a glitchless idac (current output d/a converter) provides precise modulation, thereby dramatically reducing emi. power down power down multiplication rate setting hi-z control modulation rate setting
mb88161 7 pin setting after the pin setting is changed, the stabilization wait ti me of the modulation clock is required. the stabilization wait time of the modulation clock takes the maximum value of lock-up time in ? ? ac characteristics? in electrical characteristics. each setting pin contains the pull-up resistor or pull-down resistor. therefore, these pins is set to default state for input opened. mltp multiplication setting note : set mltp pin to ?l? for input opened because mltp pin has the pull-down resistor. oe clock output enable note : when oe pin is set to ?l?, all oscillation circui ts/pll stop and enter power down mode, low-power consump- tion mode. modulation clock output (out pin) becomes hi-z state during the power down. set oe pin to ?h? for input opened because oe pin has the pull-up resistor. sprd modulation type setting note : set sprd pin to ?h? for input opened because sprd pin has the pull-up resistor. s0 / s1 modulation rate setting note : set s1 pin and s0 pin to ?h? for input opened because s1 pin and s0 pin have the pull-up resistor. mltp multiplication rate input frequency output frequency remarks l multiplied by 1 20 mhz to 28 mhz 20 mhz to 28 mhz default h multiplied by 2 14 mhz to 40 mhz 28 mhz to 80 mhz ? oe status remarks l modulation clock output (out pin) hi-z/power down status ? h operation status default sprd modulation type remarks l down spread ? h center spread default s1 s0 modulation rate remarks at down spread at center spread l l no modulation no modulation ? lh ? 1.0% 0.5% ? hl ? 4.0% 2.0% ? hh ? 2.0% 1.0% default
mb88161 8 ? center spread spectrum is spread (modulated) by c entering on the non-spread frequency. ? down spread spectrum is spread (modulated) below the non-spread frequency. ? 1.0% + 1.0% radiation level frequency non-spread frequency example of center spread modulation rate 1.0 % modulation width 2.0 % ? 2.0% non-spread frequency frequency radiation level example of down spread modulation rate ? 2.0 % modulation width 2.0 %
mb88161 9 absolute maximum ratings * : the parameter is based on v ss = 0.0 v. warning: semiconductor devices can be permanently dam aged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. do not exceed these ratings. parameter symbol rating unit min max power supply voltage* v dd ? 0.5 + 4.0 v input voltage* v i v ss ? 0.5 v dd + 0.5 v output voltage* v o v ss ? 0.5 v dd + 0.5 v storage temperature t st ? 55 + 125 c operation junction temperature t j ? 40 + 125 c output current i o ? 14 + 14 ma overshoot v iover ? v dd + 1.0 (t over 50 ns) v undershoot v iunder v ss ? 1.0 (t under 50 ns) ? v v d d v s s overshoot/undershoot t under 50 ns t over 50 ns v iover v dd + 1.0 v v iunder v ss ? 1.0 v
mb88161 10 recommended operating conditions (v ss = 0.0 v) warning: the recommended operating conditions are require d in order to ensure the normal operation of the semiconductor device. all of the device?s electric al characteristics are warranted when the device is operated within these ranges. always use semiconductor devices within their recommended operating cond ition ranges. operation outside these ranges may adversely affect re liability and could result in device failure. no warranty is made with respect to uses, operat ing conditions, or combinations not represented on the data sheet. users considering application outside the listed conditions are advised to contact their fujitsu representatives beforehand. parameter symbol pin conditions value unit min typ max power supply voltage v dd v dd ? 2.7 3.3 3.6 v ?h? level input voltage v ih xin, mltp, oe, sprd, s1, s0 ? v dd 0.80 ? v dd + 0.3 v ?l? level input voltage v il ? v ss ? v dd 0.20 v input clock duty cycle t dci xin input frequency 14 mhz to 40 mhz 40 50 60 % operating temperature ta ?? ? 40 ? + 85 c i n t a t b input clock duty cycle (t dci = t b /t a ) v dd 0.2v v dd 0.5v v dd 0.8v
mb88161 11 electrical characteristics dc characteristics (ta = ? 40 c to + 85 c, v dd = 2.7 v to 3.6 v, v ss = 0.0 v) note : when oe pin is set to ?l?, the pull-up resistor c onnected to sprd pin, s1 pin, and s0 pin and the pull-down resistor connected to mltp pin are disconnec ted, and internal signal is fixed to ?l?. see ? i/o circuit type? for details. parameter symbol pin conditions value unit min typ max power supply current i cc v dd 24 mhz output no load capacitance ? 7.0 11.0 ma power down current i pd v dd at power down (at oe=?l?) ? 520 a output voltage v oh out ?h? level output, i oh = ? 8 ma 0.8 v dd ? v dd v v ol ?l? level output, i ol = 8 ma v ss ? 0.2 v dd v output impedance z oc out 20 mhz to 80 mhz ? 30 ?? load capacitance c l out 20 mhz to 80 mhz ?? 15 pf built-in oscillation stabilization capacitance c osc xin, xout ? ? 4 ? pf input pull-up resistance r puoeh oe v ih =0.8 v dd 10 25 100 k ? r puoel oe v il =0.0v 500 800 1200 k ? r pu oe, sprd, s1, s0 v il =0.0v 25 50 200 k ? input pull-down resistance r pd mltp v ih =v dd 25 50 200 k ?
mb88161 12 ac characteristics (ta = ? 40 c to + 85 c, v dd = 2.7 v to 3.6 v, v ss = 0.0 v) note : the stabilization wait time of the modulation clock is required after the power is turned on or when the clock output enable setting (oe pin), multiplication setting (mlt p pin) or modulation rate setting (s1pin and s0 pin) is changed. the stabilization wait time of the modula tion clock takes the maximum value of lock-up time. parameter symbol pin conditions value unit min typ max input frequency f in xin mltp= ?l? crystal oscillation input 20 ? 28 mhz mltp= ? h ? crystal oscillation input 14 ? 40 crystal oscillation frequency f x xin, xout mltp= ? l ? fundamental oscillation 20 ? 28 mhz mltp= ? h ? fundamental oscillation 14 ? 40 output frequency f out out mltp= ? l ? 20 ? 28 mhz mltp= ? h ? 28 ? 80 output clock rise time tr out 0.2 v dd to 0.8 v dd load capacitance 15pf 0.4 ? 4.0 ns output clock fall time tf out 0.2 v dd to 0.8 v dd load capacitance 15 pf 0.4 ? 4.0 ns output clock duty cycle t dcc out 0.5 v dd 40 ? 60 % modulation frequency f mod out input frequency at 24mhz multiplied by 1 ? 32.0 ? khz input frequency at 24mhz multiplied by 2 ? 21.3 ? lock-up time t lk out ?? 410ms cycle-cycle jitter t jc out ta= + 25 c, v dd =3.3v, no load capacitance, standard deviation ?? 100 ps output enable ?l? width t oelw oe ? 1 ?? s power supply rise time t vdr v dd 0.0v to 2.7v 100 ?? s output hi-z start time after power down entry t pez out rise time or fall time of ?oe? at 5 ns ?? 10 ns output hi-z release time after power down exit t piz out rise time or fall time of ?oe? at 5 ns 0 ?? ns output start time after power down exit t pio out rise time or fall time of ?oe? at 5 ns load capacitance 15 pf ?? 10 ns
mb88161 13 output clock duty cycle (t dcc = t b /t a ) input frequency (f in = 1/t in ) output clock rise time/output clock fall time (t r /t f ) cycle-cycle jitter (t jc = | t n ? t n + 1 |) o ut v dd 0.5 v v dd 0.2v v dd 0.8v t a t b t in x in v dd 0.8v v dd 0.2v t f t r o ut v dd 0.2v v dd 0.8v t n+1 t n out note : cycle-cycle jitter indicates th e difference between a certain cycle and the immediately succeeding (or preceding) cycle.
mb88161 14 output enable ?l? width (t oelw ) power supply rise time (t vdr ) output hi-z start time after power down entry (t pez ) output hi-z release time ? output start time after power down exit (t piz ? t pio ) t oelw o e v dd 0.2v v dd 0.8v t vdr v dd 0.0v 2.7v t pez o e o ut hi-z v dd 0.2v t piz o e o ut hi-z t pio v dd 0.8v v dd 0.2v
mb88161 15 modulation waveform f mod = 32 khz (typ) ? 1.0 % + 1.0 % f mod = 32 khz (typ) ? 2.0 % ? modulation rate 1.0 % , example of center spread ? modulation rate ? 2.0 % , example of down spread out output frequency out output frequency frequency at modulation off frequency at modulation off time time
mb88161 16 lock-up time the clock stabilization wait time is r equired when the power is turned on. if the oe pin is fixed at ?h? level, the maximum time afte r the power is turned on until the required clock is obtained is (the stabilization wait time of input clock to xin pin) + (the lock-up time ?t lk ?) . for the stabilization wait time of input clock to the xin pin, check the characte ristics of the resonator or oscillator used. if the oe pin is used for power dow n control, the required clock is obtained at most the lock-up time ?t lk ? after the oe pin goes ?h? level. 2.7 v v dd xin oe setting pin s1, s0, mltp, sprd v ih v ih out oscillation stabilization wait time t lk (lock-up time ) 2.7 v v dd xin oe setting pin s1, s0, mltp, sprd v ih v ih out oscillation stabilization wait time t lk (lock-up time )
mb88161 17 if the setting pin (s1, s0, mltp, or sprd) is used for control during nor mal operation, the required clock is ob- tained at most the lock-up time ?t lk ? after the level at the pin is determined. note : the wait time for the clock signal output from the out pin to become stable is required after the ic is released from power-down mode by the oe pin or after another pin?s setting is changed. during the period until the output clock signal becomes stable, the output frequenc y, output clock duty cycle, modulation period, and cycle-cycle jitter characteristic c annot be guaranteed. it is therefore advisable to perform processing such as cancelling a reset of the device at the succeeding stage after the lock-up time. v il v ih v ih xin oe out setting pin s1, s0, mltp, sprd t lk (lock-up time ) t lk (lock-up time )
mb88161 18 crystal oscillation circuit the figure below shows the connection example about genera l crystal resonator. the oscillation circuit has the built-in feedback resistor (500k ? ) and oscillation stabilization capacitance (4 pf). because the value of oscillation stabilization capacitance must be adjuste d to the most suitable value of i ndividual oscillator, add the capacitance (c1 and c2) to lsi external if necessary. interconnection circuit example c 1 r f (500k ? ) c 2 4 pf 4 pf xin pin lsi internal lsi external xout pin 234 56 7 8 9 18 17 16 1 14 13 12 11 10 15 mb88161 xout xin s0 v ss sprd out s1 r 1 oe v dd mltp c 1 c 2 c 4 c 3 + c 1 , c 2 : oscillation stabilization capacitance (see ? crystal oscillation circuit?.) c 3 : capacitor of 10 f or higher c 4 : capacitor of about 0.01 f (connect a capacitor of good hi gh frequency property (ex. laminated ceramic capacitor) to close to this device) r 1 : impedance matching resistor for board pattern
mb88161 19 ordering information part no. package emboss taping mb88161pvb-g-efe1 18-pin plastic bcc (lcc-18p-m05) ef type MB88161PVB-G-ERE1 er type
mb88161 20 package dimension 18-pin plastic bcc (lcc-18p-m05) dimensions in mm (inches) note: the values in parentheses are reference values. c 2003 fujitsu limited c18058s-c-1-1 0.05(.002) 1 2.70 0.10 2.40 0.10 (.094 .004) 0.45 0.05 0.075 0.025 (.003 .001) (.018 .002) (stand off) 0.45(.018) typ. 2.31(.090) 1.90(.075) ref 2.01(.079) typ typ. 0.45(.018) 1.35(.053) 2.28(.090) "a" "b" "c" 15 10 6 6 1 15 10 0.28 0.06 (.011 .002) 0.36 0.06 (.014 .002) c0.10(.004) 0.25 0.06 (.010 .002) 0.25 0.06 (.010 .002) details of "b" part details of "c" part details of "a" part (.106 .004) ref ref typ index area min. 0.14(.006) (mount height) (.011 .002) 0.28 0.06 (.014 .002) 0.36 0.06 0.90(.035) ref
mb88161 fujitsu limited all rights reserved. the contents of this document are subject to change without notice. customers are advised to consult with fujitsu sales representatives before ordering. the information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of fujitsu semiconductor device; fujitsu does not warrant proper operation of the device with respect to use based on such information. when you develop equipment incorporating the device based on such information, you must assume any responsibility arising out of such use of the information. fujitsu assumes no liability for any damages whatsoever arising out of the use of the information. any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use or exercise of any intellectual property right, such as patent right or copyright, or any ot her right of fujitsu or any third party or does fujitsu warrant non-in fringement of any third-party?s intellectual property right or othe r right by using such information. fujitsu assumes no liability for any infringement of the intellectual property rights or other rights of third parties which would result from the use of information contained herein. the products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremel y high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, ai rcraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon syst em), or (2) for use requiring extremely high reliability (i.e., su bmersible repeater and artificial satellite). please note that fujitsu will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. any semiconductor devices have an inherent chance of failure. you must protect against injury, damage or loss from such failures by incorporating safety design m easures into your facility and equipment such as redundancy, fi re protection, and prevention of over-current levels and other abnormal operating conditions. if any products described in this document represent goods or technologies subject to certain restrictions on export under the foreign exchange and foreign trade law of japan, the prior authorization by japanese government will be required for export of those products from japan. f0602 ? 2006 fujitsu limited printed in japan

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